Stage ingénieur fin d'étude

Date de mise à jour de l’offre

Chronocam SA :

Chronocam develops innovative image sensors and systems for applications in all fields of machine vision. The sensor technology is inspired by biological eyes, acquiring, and processing the visual information in an extremely performing yet highly efficient way. Our technology outperforms conventional vision systems currently used everywhere, offering disruptive solutions for problems considered until now out of reach and setting a new standard in machine vision. Our goal is to initiate a radical paradigm shift in vision sensing and processing across all fields of machine vision. Chronocam was formed by an international group of experienced entrepreneurs and outstanding researchers, among the leading pioneers in the field.

Description de la mission

INTERNSHIP PURPOSE

Chronocam has already developed a neuromorphic image sensor developed in a 0.18-um CIS process. In order to serve some markets, there is a push for Chronocam to achieve higher resolution sensor and smaller pixel pitch.

Conventional pixel are made of few transistors, usually 3 or 4, sometimes 5 or 6. However, our pixel technology is rather different and is made of 20 up to ~100 transistors. Hence, there is room for analog design and behavioral modelisation.

We are looking for a student with some knowledge on analogue & mixed-IC design and mixed model behavioral modelisation. The candidate should have some degree of autonomy and ready to evolve in French/English environment. He or she will develop high level behavioral simulation models of mixed mode design IPs of current and future sensor designed in a CIS (CMOS Image Sensor) process.

This is a great opportunity to have an experience in a fast-growing company and to participate to a paradigm shift in computer vision across many industries.



INTERNSHIP DETAILS

• Study current Image sensor architecture and design.

• Perform analogue & mixed-signal and behavioural simulations (spice).

• Develop behavioural models of Image sensor design IPs

• Perform comparison between analogue & mixed mode and behavioural models simulations.

• Prepare detailed written design report and specifications.

Profil recherché

Education: MSc student in Electrical Engineering with some analogue IC design specialization.

Preferred knowledge:

• Some knowledge of CMOS fabrication technology and design aspects in nanometre CMOS analogue & mixed-mode design

• Understanding of low-power circuit design, MOS sub-threshold regime.

• Knowledge of the Cadence IC design environment (Virtuoso, Spectre, Assura) OR

• Knowledge of the Mentor Graphics IC design environment (Pyxis, IC-Station, Calibre)

• Knowledge of Matlab, A-VHDL/VHDL-AMS/VHDL, Verilog-A is desirable



Language skills: good English level is required.

Niveau de qualification requis

Bac + 4/5 et +
  • Employeur
    Chronocam SA
  • Secteur d’activité de la structure
    Emploi - Economie - Innovation - Numérique
  • Effectif de la structure
    De 21 à 50 salariés
  • Type de stage ou contrat
    Stage pour lycéens et étudiants en formation initiale
  • Date prévisionnelle de démarrage
  • Durée du stage ou contrat
    Supérieur à 6 mois
  • Le stage est-il rémunéré ?
    Oui
  • Niveau de qualification requis

    Bac + 4/5 et +
  • Lieu du stage
    74 rue du Faubourg Saint Antoine
    75012 Paris
  • Accès et transports
    RATP